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| Opteron (Socket 940) (NOT compatible with Socket AM2 CPUs!) | ||||
|---|---|---|---|---|
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
(Clawhammer DP) (128-bit on-Die DDR PC2700 mem controller; 8GB max) [not released] | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | ? million 0.13µm process 104mm² die |
| Opteron 140 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$229} | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 140EE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) January, 2005 | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.15v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 142 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$438} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 144 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$669} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 146 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) September 9, 2003 - {$669} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 146HE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2005? | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 148 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) November 17, 2003 - {$733} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 150 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) May 18, 2004 - {$637} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 240 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) April 22, 2003 - {$283} | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 240EE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) January, 2005 | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.15v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 242 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) April 22, 2003 - {$690} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 244 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) April 22, 2003 - {$794} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 246 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) August 5, 2003 - {$794} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 246HE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) January, 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 248 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) November 17, 2003 - {$913} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 250 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) May 18, 2004 - {$851} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 840 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$749} | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 840EE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) January, 2005 | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.15v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 842 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$1299} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 844 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$2149} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 846 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) September 9, 2003 - {$3199} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 846HE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2005? | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 848 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) November 17, 2003 - {$3199} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 850 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) May 18, 2004 - {$1514} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron 146 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 148HE MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 1Q 2005 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.3v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 152 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 154 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 156 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 242 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$163} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 244 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$209} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 246 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$316} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 248 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$455} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 248HE MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 1Q 2005 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.3v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 250 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$690} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 252 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$851} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 254 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) October, 2005 - {$851} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 256 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 842 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$698} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 844 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$698} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 846 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$698} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 848 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$873} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 848HE MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 1Q 2005 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.3v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 850 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$1165} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 852 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$1514} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 854 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) August, 2005 | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 856 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 165 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 24, 2005 - {$637} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 165EE MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 170 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 24, 2005 - {$799} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 175 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 24, 2005 - {$999} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 180 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) October 24, 2005 - {$799} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 185 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) April, 2006 | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 260HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 265 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 4, 2005 - {$851} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 265HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 270 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 4, 2005 - {$1051} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 270HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 275 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 4, 2005 - {$1299} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 275HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2006 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 280 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) September 26, 2005 - {$1299} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 285 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) March 6, 2006 - {$1051} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 290 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2006 | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 860HE MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.2v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 865 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) April 21, 2005 - {$1514} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 865HE MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.2v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 870 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) April 21, 2005 - {$2169} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 870HE MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.2v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 875 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) April 21, 2005 - {$2649} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 880 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) September 26, 2005 - {$2649} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 885 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) March 6, 2006 - {$2149} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 890 MMX 3DNow! SSE SSE2 SSE3 (Egypt) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2006 | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron (Socket 939) | ||||
|---|---|---|---|---|
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
| Opteron 144 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) August 2, 2005 - {$125} | 939 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 146 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) August 2, 2005 | 939 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 148 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) August 2, 2005 | 939 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 150 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) August 2, 2005 | 939 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 152 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) August 2, 2005 - {$799} | 939 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 154 MMX 3DNow! SSE SSE2 (Venus - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller; 8GB max) 2H 2005 | 939 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron 165 MMX 3DNow! SSE SSE2 SSE3 (Denmark - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller) (dual core) 2H 2005 | 939 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 939 | 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 170 MMX 3DNow! SSE SSE2 SSE3 (Denmark - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller) (dual core) 2H 2005 | 939 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron 175 MMX 3DNow! SSE SSE2 SSE3 (Denmark - unbuffered) (128-bit on-Die ECC unbuffered DDR PC3200 mem controller) (dual core) 2H 2005 | 939 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron (Socket AM2) | ||||
|---|---|---|---|---|
| AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
| Opteron 1210 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$255} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1210 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$168} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1212 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$377} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1212 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$209} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1214 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$523} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1214 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$247} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1216 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$698} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1216 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$291} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1218 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$873} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1218 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$432} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1220 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 7, 2007 - {$545} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1220 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) August 15, 2006 - {$1165} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1222 MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) 2008 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1222 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) 2008 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 1224 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Ana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) 2008 | 940 pins 3200MHz (200x16) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron ??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Budapest) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) 2009? | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | ? million 0.065µm process ?mm² die |
| Opteron (Socket F / Socket G34) | ||||
|---|---|---|---|---|
| AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
| Opteron 2210 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$255} | 1207 balls 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2210 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$316} | 1207 balls 1800MHz (200x9) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2212 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$377} | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2212 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$450} | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2214 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$523} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2214 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$611} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2216 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$698} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2216 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$786} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2218 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$873} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2218 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) February 7, 2007 - {$611} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2220 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) February 7, 2007 - {$698} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2220 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1165} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) 1.375v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2222 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) 2008 | 1207 balls 3000MHz (200x15) (64-bit dual-pumped bus) 1.375v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 2224 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) 2008 | 1207 balls 3200MHz (200x16) (64-bit dual-pumped bus) 1.4v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8212 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$873} | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8212 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1019} | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8214 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1165} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8214 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1340} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8216 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1514} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8216 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$1832} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8218 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$2149} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8218 HE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) February 7, 2007 - {$1340} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.25v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8220 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) February 7, 2007 - {$1514} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8220 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) August 15, 2006 - {$2649} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) 1.375v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8222 MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) April 9, 2008 - {$1514} | 1207 balls 3000MHz (200x15) (64-bit dual-pumped bus) 1.35v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8222 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) April 9, 2008 - {$1514} | 1207 balls 3000MHz (200x15) (64-bit dual-pumped bus) 1.375v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron 8224 SE MMX 3DNow! SSE SSE2 SSE3 (Santa Rosa) (128-bit on-Die registered DDR2 PC5400 mem controller) (dual core) April 9, 2008 - {$2149} | 1207 balls 3200MHz (200x16) (64-bit dual-pumped bus) 1.4v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Opteron ??? MMX 3DNow! SSE SSE2 SSE3 (Deerhound) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) 2009? | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) | ? million 0.065µm process ?mm² die |
| Opteron 1352 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) June 3, 2008 - {$209} | 1207 balls 2100MHz (200x10.5) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 1354 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) June 3, 2008 - {$255} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 1356 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) June 3, 2008 - {$377} | 1207 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2344 HE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1700MHz (200x8.5) (64-bit dual-pumped bus) 1.15v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2346 HE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2347 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2347 HE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.15v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2350 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2352 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$316} | 1207 balls 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2354 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$455} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2356 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$690} | 1207 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2358 SE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$873} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2360 SE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$1165} | 1207 balls 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 8346 HE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 8347 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 8347 HE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.15v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 8350 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) September 10, 2007 | 1207 balls 2000MHz (200x10) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 8354 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$1165} | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 8356 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$1514} | 1207 balls 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.2v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 8358 SE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$1865} | 1207 balls 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 8360 SE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Barcelona) (128-bit on-Die registered DDR2 PC5400 mem controller) (quad core) April 9, 2008 - {$2149} | 1207 balls 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket F | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | 463 million 0.065µm process 288mm² die |
| Opteron 2372 HE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 - {$316} | 1207 pins 2100MHz (200x10.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 2374 HE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 - {$450} | 1207 pins 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 2376 HE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 - {$575} | 1207 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 2376 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$377} | 1207 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 2378 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$523} | 1207 pins 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 2380 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$698} | 1207 pins 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 2382 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$873} | 1207 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 2384 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$989} | 1207 pins 2700MHz (200x13.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 2386 SE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 | 1207 pins 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 8374 HE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 - {$1165} | 1207 pins 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 8376 HE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 - {$1514} | 1207 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 8378 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$1165} | 1207 pins 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 8380 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$1514} | 1207 pins 2500MHz (200x12.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 8382 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$1865} | 1207 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 8384 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) November 13, 2008 - {$2149} | 1207 pins 2700MHz (200x13.5) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron 8386 SE MMX 3DNow! SSE SSE2 SSE3 SSE4 (Shanghai) (128-bit on-Die registered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) January 26, 2009 | 1207 pins 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (32-way) | 758 million 0.045µm process 258mm² die |
| Opteron ??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Istanbul) (128-bit on-Die registered DDR2 PC5400 mem controller) (6 cores, HT 3.0, DICE) 2H 2009? | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F+ | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x ?KB on-Die unified L2 (16-way exclusive) | ? million 0.045µm process ?mm² die |
| Opteron ??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Greyhound) (128-bit on-Die registered DDR2 PC5400, or FBD mem controller) (quad core, HT 3.0, DICE) 2009? | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | ? million ?µm process ?mm² die |
| Opteron ??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Zamora) (128-bit on-Die FBD mem controller) (quad core, HT 3.0, DICE) 2009? | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (32-way) | ? million ?µm process ?mm² die |
| Opteron ??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Cadiz) (128-bit on-Die registered DDR2/3 PC? mem controller) (quad core, HT 3.0, DICE) 2009? | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) | ? million ?µm process ?mm² die |
| Opteron ??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Sandtiger) (128-bit on-Die registered DDR3 PC? mem controller) (8 cores, HT 3.0, DICE) 2009? | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F+ | 8x 64KB data (2-way) 8x 64KB instruction (2-way) 8x ?KB on-Die unified L2 (16-way exclusive) | ? million 0.045µm process ?mm² die |
| Opteron ??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Sao Paolo) (128-bit on-Die registered DDR3 PC? mem controller) (6 cores, HT 3.0, DICE) 1H 2010? | 1944 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket G34 | 6x 64KB data (2-way) 6x 64KB instruction (2-way) 6x ?KB on-Die unified L2 (16-way exclusive) | ? million ?µm process ?mm² die |
| Opteron ??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Montreal) (128-bit on-Die registered DDR3 PC? mem controller) (8 cores, HT 3.0, DICE) 2009? | 1944 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket G34 | 8x 64KB data (2-way) 8x 64KB instruction (2-way) 8x 1MB on-Die unified L2 (16-way exclusive) 12MB on-Die shared L3 (?-way) | ? million ?µm process ?mm² die |
| Opteron ??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Magny Cours) (128-bit on-Die registered DDR3 PC? mem controller) (12 cores, HT 3.0, DICE) 2010? | 1944 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket G34 | 12x 64KB data (2-way) 12x 64KB instruction (2-way) 12x ?KB on-Die unified L2 (16-way exclusive) | ? million ?µm process ?mm² die |
| Xeon (Socket 775) | ||||
|---|---|---|---|---|
| Intel Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
| Xeon 3040 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) September 26, 2006 | 775 balls 1866MHz (266x7) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2MB on-Die shared L2 (8-way) | 291 million 0.065µm process 143mm² die |
| Xeon 3050 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) September 26, 2006 | 775 balls 2133MHz (266x8) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2MB on-Die shared L2 (8-way) | 291 million 0.065µm process 143mm² die |
| Xeon 3060 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) September 26, 2006 | 775 balls 2400MHz (266x9) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon 3065 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) November 11, 2007 | 775 balls 2666MHz (333x7) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon 3070 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) September 26, 2006 | 775 balls 2666MHz (266x10) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon 3075 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) November 11, 2007 | 775 balls 2666MHz (333x8) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon 3085 MMX SSE SSE2 SSE3 (Conroe) (dual core, EM64T, NX bit, VT) November 11, 2007 | 775 balls 3000MHz (333x9) (64-bit quad-pumped bus) 1.2v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon L3110 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) February, 2009 - {$224} | 775 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon E3110 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) January, 2008 | 775 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon E3120 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) August 11, 2008 - {$188} | 775 balls 3166MHz (333x9.5) (64-bit quad-pumped bus) ?v | Socket 775 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 8MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon X3210 MMX SSE SSE2 SSE3 (Kentsfield) (quad core (dual die), EM64T, NX bit, VT) January 8, 2007 - {$690} | 775 balls 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon X3220 MMX SSE SSE2 SSE3 (Kentsfield) (quad core (dual die), EM64T, NX bit, VT) January 8, 2007 - {$851} | 775 balls 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon X3230 MMX SSE SSE2 SSE3 (Kentsfield) (quad core (dual die), EM64T, NX bit, VT) 3Q 2007 | 775 balls 2666MHz (266x10) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon X3320 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) March 24, 2008 - {$266} | 775 balls 2500MHz (333x7.5) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) | 820 million 0.045µm process 214mm² die |
| Xeon X3330 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) August 11, 2008 - {$266} | 775 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) | 820 million 0.045µm process 214mm² die |
| Xeon X3350 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) March 24, 2008 - {$316} | 775 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon L3360 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) February, 2009 - {$369} | 775 balls 2833MHz (333x8.5) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon X3360 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) March 24, 2008 - {$530} | 775 balls 2833MHz (333x8.5) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon X3370 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) August 11, 2008 - {$530} | 775 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon X3380 MMX SSE SSE2 SSE3 SSE4 (Yorkfield) (quad core (dual die), EM64T, NX bit, VT) February, 2009 - {$530} | 775 balls 3166MHz (333x9.5) (64-bit quad-pumped bus) ?v | Socket 775 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon (Socket 771) | ||||
|---|---|---|---|---|
| Intel Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
| Xeon 5020 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit) | 771 balls 2500MHz (166x15) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process 206mm² die |
| Xeon 5030 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit, VT) May 23, 2006 | 771 balls 2666MHz (166x16) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process 206mm² die |
| Xeon 5040 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit) | 771 balls 2833MHz (166x17) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process 206mm² die |
| Xeon 5050 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit, VT) May 23, 2006 | 771 balls 3000MHz (166x18) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process 206mm² die |
| Xeon 5060 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit, VT) May 23, 2006 | 771 balls 3200MHz (266x12) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process 206mm² die |
| Xeon 5063 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit, VT) May 23, 2006 | 771 balls 3200MHz (266x12) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process 206mm² die |
| Xeon 5070 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit) | 771 balls 3466MHz (266x13) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process 206mm² die |
| Xeon 5080 MMX SSE SSE2 SSE3 (Dempsey) (dual die, Jackson Hyperthreading, EM64T, NX bit, VT) May 23, 2006 | 771 balls 3733MHz (266x14) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 16KB data (8-way) 2x 12k µops trace instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 230 million 0.065µm process 206mm² die |
| Xeon LV 5128 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) December 1, 2006 | 771 balls 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon LV 5138 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) December 1, 2006 | 771 balls 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon LV 5148 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon 5110 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 1600MHz (266x6) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon 5120 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon 5130 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 2000MHz (333x6) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon 5140 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon 5150 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon 5160 MMX SSE SSE2 SSE3 (Woodcrest) (dual core, EM64T, NX bit, VT) June 26, 2006 | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 4MB on-Die shared L2 (16-way) | 291 million 0.065µm process 143mm² die |
| Xeon L5215 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) August, 2008 | 771 balls ?MHz (?x?) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon L5238 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) February 27, 2008 | 771 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon L5240 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) 2008 | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon E5205 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) November 11, 2007 - {$177} | 771 balls 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon E5220 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) February 27, 2008 | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon E5240 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) February 27, 2008 | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon X5260 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) November 11, 2007 - {$851} | 771 balls 3333MHz (333x10) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon X5270 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) September 8, 2008 - {$1172} | 771 balls 3500MHz (333x10.5) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon X5272 MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) November 11, 2007 - {$1172} | 771 balls 3400MHz (400x8.5) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon X52?? MMX SSE SSE2 SSE3 SSE4 (Wolfdale) (dual core, EM64T, NX bit, VT) 2009? | 771 balls ?MHz (?x?) (64-bit quad-pumped bus) ?v | Socket 771 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 6MB on-Die shared L2 (24-way) | 410 million 0.045µm process 107mm² die |
| Xeon L5310 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) March 12, 2006 - {$455} | 771 balls 1600MHz (266x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon L5318 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) September 5, 2007 | 771 balls 1600MHz (266x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon L5320 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) March 12, 2007 - {$519} | 771 balls 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon L5335 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit, VT) August 13, 2007 - {$380} | 771 balls 2000MHz (333x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon E5310 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) November 27, 2006 - {$455} | 771 balls 1600MHz (266x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon E5320 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) November 27, 2006 - {$690} | 771 balls 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon E5335 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T, NX bit) 4Q 2006 | 771 balls 2000MHz (333x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon E5345 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T) November 27, 2006 - {$851} | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon X5355 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T) November 27, 2006 - {$1172} | 771 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon X5365 MMX SSE SSE2 SSE3 (Clovertown) (quad core (dual die), EM64T) August 13, 2007 - {$1172} | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die shared L2 (16-way) | 582 million 0.065µm process 284mm² die |
(Whitefield) (quad core, EM64T, NX bit, VT) [cancelled] | 771 balls ?MHz (?x?) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 8x 2MB on-Die shared L2 (8-way) | ? million 0.065µm process ?mm² die |
| Xeon L5408 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) February 27, 2008 | 771 balls 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon L5410 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) March 25, 2008 - {$320} | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon L5420 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) March 25, 2008 - {$380} | 771 balls 2500MHz (333x7.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon L5430 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) September 8, 2008 - {$562} | 771 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon E5405 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$209} | 771 balls 2000MHz (333x6) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon E5410 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$256} | 771 balls 2333MHz (333x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon E5420 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$316} | 771 balls 2500MHz (333x7.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon E5430 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$455} | 771 balls 2666MHz (333x8) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon E5440 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$690} | 771 balls 2833MHz (333x8.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon E5450 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$915} | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon E5462 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$797} | 771 balls 2800MHz (400x7) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon E5472 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$1022} | 771 balls 3000MHz (400x7.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon X5450 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$851} | 771 balls 3000MHz (333x9) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon X5460 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$1172} | 771 balls 3166MHz (333x9.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon X5470 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) September 8, 2008 - {$1386} | 771 balls 3333MHz (333x10) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon X5472 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$958} | 771 balls 3000MHz (400x7.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon X5482 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) November 11, 2007 - {$1279} | 771 balls 3200MHz (400x8) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon X5492 MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) September 8, 2008 - {$1493} | 771 balls 3400MHz (400x8.5) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon X54?? MMX SSE SSE2 SSE3 SSE4 (Harpertown) (quad core (dual die), EM64T, NX bit, VT) 2009? | 771 balls ?MHz (400x?) (64-bit quad-pumped bus) ?v | Socket 771 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 6MB on-Die shared L2 (24-way) | 820 million 0.045µm process 214mm² die |
| Xeon (Socket 604) | ||||
|---|---|---|---|---|
| Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
| Xeon MP L7345 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$2301} | 1866MHz (266x7) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 0.065µm process 284mm² die |
| Xeon MP E7210 MMX SSE SSE2 SSE3 (Tigerton) (dual core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$1980} | 604 pins 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 604 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon MP E7220 MMX SSE SSE2 SSE3 (Tigerton) (dual core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$1980} | 604 pins 2933MHz (266x11) (64-bit quad-pumped bus) ?v | Socket 604 | 2x 32KB data (8-way) 2x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon MP E7310 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$856} | 604 pins 1600MHz (266x6) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 582 million 0.065µm process 284mm² die |
| Xeon MP E7320 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$856} | 604 pins 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 2MB on-Die unified L2 (8-way) | 582 million 0.065µm process 284mm² die |
| Xeon MP E7330 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$856} | 604 pins 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die unified L2 (12-way) | 582 million 0.065µm process 284mm² die |
| Xeon MP E7340 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$856} | 604 pins 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon MP X7350 MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) September 5, 2007 - {$2301} | 604 pins 2933MHz (266x11) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon MP X73xx MMX SSE SSE2 SSE3 (Tigerton) (quad core (dual die), EM64T, NX bit, VT) 2009? | 604 pins ?MHz (266x?) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 4MB on-Die unified L2 (16-way) | 582 million 0.065µm process 284mm² die |
| Xeon L7445 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (quad core, EM64T, NX bit, VT) September 15, 2008 - {$1980} | 604 pins 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) 12MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
| Xeon L7455 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (six cores, EM64T, NX bit, VT) September 15, 2008 - {$2729} | 604 pins 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 604 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 3x 3MB on-Die shared L2 (12-way) 12MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
| Xeon E7420 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (quad core, EM64T, NX bit, VT) September 15, 2008 - {$1177} | 604 pins 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) 8MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
| Xeon E7430 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (quad core, EM64T, NX bit, VT) September 15, 2008 - {$1391} | 604 pins 2133MHz (266x8) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) 12MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
| Xeon E7440 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (quad core, EM64T, NX bit, VT) September 15, 2008 - {$1980} | 604 pins 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 604 | 4x 32KB data (8-way) 4x 32KB instruction (8-way) 2x 3MB on-Die shared L2 (12-way) 16MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
| Xeon E7450 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (six cores, EM64T, NX bit, VT) September 15, 2008 - {$2301} | 604 pins 2400MHz (266x9) (64-bit quad-pumped bus) ?v | Socket 604 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 3x 3MB on-Die shared L2 (12-way) 12MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
| Xeon X7460 MMX SSE SSE2 SSE3 SSE4 (Dunnington) (six cores, EM64T, NX bit, VT) September 15, 2008 - {$2729} | 604 pins 2666MHz (266x10) (64-bit quad-pumped bus) ?v | Socket 604 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 3x 3MB on-Die shared L2 (12-way) 16MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
| Xeon X74?? MMX SSE SSE2 SSE3 SSE4 (Dunnington) (six cores, EM64T, NX bit, VT) 2009? | 604 pins ?MHz (266x?) (64-bit quad-pumped bus) ?v | Socket 604 | 6x 32KB data (8-way) 6x 32KB instruction (8-way) 3x 3MB on-Die shared L2 (12-way) 16MB on-Die shared L3 (16-way) | 1900 million 0.045µm process 503mm² die |
| Xeon (Socket 1366) | ||||
|---|---|---|---|---|
| Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
| Xeon W3520 MMX SSE SSE2 SSE3 SSE4.2 (Bloomfield) 192-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$284} | 1366 balls 2666MHz (133x20) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 246mm² die |
| Xeon W3540 MMX SSE SSE2 SSE3 SSE4.2 (Bloomfield) 192-bit DDR3 on-Die unbuffered PC8500 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$562} | 1366 balls 2933MHz (133x22) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 246mm² die |
| Xeon W3570 MMX SSE SSE2 SSE3 SSE4.2 (Bloomfield) 192-bit DDR3 on-Die unbuffered PC10666 mem controller (quad core, 1xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$999} | 1366 balls 3200MHz (133x24) (64-bit QPI) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (16-way) | 731 million 0.045µm process 246mm² die |
| Xeon (Nehalem) | ||||
|---|---|---|---|---|
| Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
| Xeon L5506 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC6400 mem controller (quad core, 2xQPI, EM64T, NX bit, VT) March 30, 2009 - {$423} | 1366 balls 2133MHz (133x16) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon L5508 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (dual core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$?} | 1366 balls 2000MHz (133x15) (64-bit quad-pumped bus) ?v | Socket 1366 | 2x 32KB data (8-way) 2x 32KB instruction (4-way) 2x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon L5518 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$?} | 1366 balls 2133MHz (133x16) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon L5528 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$530} | 1366 balls 2266MHz (133x17) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon E5502 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC6400 mem controller (dual core, 2xQPI, EM64T, NX bit, VT) March 30, 2009 - {$188} | 1366 balls 1866MHz (133x14) (64-bit quad-pumped bus) ?v | Socket 1366 | 2x 32KB data (8-way) 2x 32KB instruction (4-way) 2x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon E5504 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC6400 mem controller (quad core, 2xQPI, EM64T, NX bit, VT) March 30, 2009 - {$224} | 1366 balls 2000MHz (133x15) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon E5506 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC6400 mem controller (quad core, 2xQPI, EM64T, NX bit, VT) March 30, 2009 - {$266} | 1366 balls 2133MHz (133x16) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 4MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon E5520 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$373} | 1366 balls 2266MHz (133x17) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon E5530 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$530} | 1366 balls 2400MHz (133x18) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon E5540 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC8500 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$744} | 1366 balls 2533MHz (133x19) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon X5550 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$958} | 1366 balls 2666MHz (133x20) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon X5560 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$1172} | 1366 balls 2800MHz (133x21) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon X5570 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$1386} | 1366 balls 2933MHz (133x22) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon W5580 MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 192-bit DDR3 on-Die Registered PC10666 mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) March 30, 2009 - {$1600} | 1366 balls 3200MHz (133x24) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon ??? MMX SSE SSE2 SSE3 SSE4.2 (Gainestown, Nehalem-EP) 2x192-bit DDR3 on-Die Registered PC? mem controller (quad core, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) 2009? | 1366 balls ?MHz (?x?) (64-bit quad-pumped bus) ?v | Socket 1366 | 4x 32KB data (8-way) 4x 32KB instruction (4-way) 4x 256KB on-Die unified L2 (8-way) 8MB on-Die shared L3 (?-way) | 731 million 0.045µm process 246mm² die |
| Xeon ??? MMX SSE SSE2 SSE3 SSE4.2 (Westmere) 2x192-bit DDR3 on-Die Registered PC? mem controller (6 cores, 2xQPI, SMT Hyperthreading, EM64T, NX bit, VT) 2010? | 1366 balls ?MHz (?x?) (64-bit quad-pumped bus) ?v | Socket 1366 | 6x 32KB data (8-way) 6x 32KB instruction (4-way) 6x 256KB on-Die unified L2 (8-way) 12MB on-Die shared L3 (?-way) | ? million 0.032µm process ?mm² die |
| Xeon MP ??? MMX SSE SSE2 SSE3 SSE4.2 (Beckton, Nehalem-EX) 4x256-bit FB-DIMM2 on-Die PC? mem controller (8 cores (dual die), 4xQPI, SMT Hyperthreading, EM64T, NX bit, VT) 2009? | 1567 balls ?MHz (?x?) (64-bit quad-pumped bus) ?v | Socket LS | 8x 32KB data (8-way) 8x 32KB instruction (4-way) 8x 256KB on-Die unified L2 (8-way) 2x 8MB on-Die shared L3 (?-way) | 2300 million 0.045µm process ?mm² die |
| Xeon MP ??? MMX SSE SSE2 SSE3 SSE4.2 ( ? ) ?-bit on-Die PC? mem controller (6 cores, ?xQPI, SMT Hyperthreading, EM64T, NX bit, VT) 20?? | ? balls ?MHz (?x?) (64-bit quad-pumped bus) ?v | Socket ? | 6x ?KB data (?-way) 6x ?KB instruction (?-way) 9MB on-Die shared L2 (?-way) 16MB on-Die shared L3 (?-way) | 1900 million 0.045µm process ?mm² die |
| Itanium | ||||
|---|---|---|---|---|
| Intel Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
| Itanium 733 MMX SSE (Merced) July, 2001 | 418 pins 733MHz (133x5.5) (64-bit dual-pumped bus) ?v | PAC418 | 16KB data (4-way) 16KB instruction (4-way) 96KB on-Die unified L2 (6-way) 2MB or 4MB unified L3 (4-way) | 25 million 0.18µm process ~300mm² die ? million L3 {?µm - ?mm²} (2MB) 295 million L3 {?µm - ?mm²} (4MB) |
| Itanium 800 MMX SSE (Merced) July, 2001 | 418 pins 800MHz (133x6.0) (64-bit dual-pumped bus) ?v | PAC418 | 16KB data (4-way) 16KB instruction (4-way) 96KB on-Die unified L2 (6-way) 2MB or 4MB unified L3 (4-way) | 25 million 0.18µm process ~300mm² die ? million L3 {?µm - ?mm²} (2MB) 295 million L3 {?µm - ?mm²} (4MB) |
| Itanium 2 900 MMX SSE (McKinley) July 8, 2002 - {$1338} (1.5MB) | 611 pins 900MHz (200x4.5) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 1.5MB on-Die unified L3 | 221 million 0.18µm process 463mm² die |
| Itanium 2 1.0G MMX SSE (McKinley) July 8, 2002 - {$?} (1.5MB) July 8, 2002 - {$4226} (3MB) | 611 pins 1000MHz (200x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 1.5MB or 3MB on-Die unified L3 | 221 million 0.18µm process 463mm² die |
| Itanium 2 1.3G MMX SSE (Madison) - copper chip June 30, 2003 - {$1338} | 611 pins 1300MHz (200x6.5) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 3MB on-Die unified L3 | ~500 million 0.13µm process ?mm² die |
| Itanium 2 1.4G MMX SSE (Madison) - copper chip June 30, 2003 - {$2247} | 611 pins 1400MHz (200x7.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 4MB on-Die unified L3 | ~500 million 0.13µm process ?mm² die |
| Itanium 2 1.5G MMX SSE (Madison) - copper chip June 30, 2003 - {$3692} (6MB) November, 2004 (4MB) | 611 pins 1500MHz (200x7.5) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 4MB or 6MB on-Die unified L3 | ~500 million 0.13µm process ?mm² die |
| Itanium 2 1.6G MMX SSE (Madison 9M) November, 2004 | 611 pins 1600MHz (200x8.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 6MB or 9MB on-Die unified L3 | 592 million 0.13µm process 432mm² die |
| Itanium 2 1.66G MMX SSE (Madison 9M) July, 2005 | 611 pins 1666MHz (333x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 6MB or 9MB on-Die unified L3 | 592 million 0.13µm process 432mm² die |
| LV Itanium 2 1.0G MMX SSE (Deerfield) September 8, 2003 - {$744} | 611 pins 1000MHz (200x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 1.5MB on-Die unified L3 | 410 million 0.13µm process 374mm² die |
| LV Itanium 2 1.3G MMX SSE (Deerfield) November, 2004 | 611 pins 1300MHz (200x6.5) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 3MB on-Die unified L3 | 410 million 0.13µm process 374mm² die |
| Itanium 2 1.4G MMX SSE (Deerfield) September 8, 2003 - {$1172} (1.5MB) April 13, 2004 - {$1172} (3MB) | 611 pins 1400MHz (200x7.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 1.5MB or 3MB on-Die unified L3 | 410 million 0.13µm process 374mm² die |
| Itanium 2 1.6G MMX SSE (Deerfield) May, 2004 - {$2408} | 611 pins 1600MHz (200x8.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 3MB on-Die unified L3 | 410 million 0.13µm process 374mm² die |
| Itanium 2 1.6G MMX SSE (Deerfield) November, 2004 - {$2408} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 16KB data 16KB instruction 256KB on-Die unified L2 3MB on-Die unified L3 | 410 million 0.13µm process 374mm² die |
| Itanium 9010 MMX SSE (Montecito) (Jackson Hyperthreading, VT) July 18, 2006 - {$696} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | ?KB data ?KB instruction 1MB on-Die unified L2 6MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9015 MMX SSE (Montecito) (dual core, Jackson Hyperthreading, VT) July 18, 2006 - {$749} | 611 pins 1400MHz (200x7.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 6MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9020 MMX SSE (Montecito) (dual core, Jackson Hyperthreading, VT) July 18, 2006 - {$910} | 611 pins 1420MHz (266x?) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 6MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9030 MMX SSE (Montecito) (dual core, Jackson Hyperthreading, VT) July 18, 2006 - {$1552} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 4MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9040 MMX SSE (Montecito) (dual core, Jackson Hyperthreading, VT) July 18, 2006 - {$1980} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 9MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9050 MMX SSE (Montecito) (dual core, Jackson Hyperthreading, VT) July 18, 2006 - {$3692} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 12MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9110N MMX SSE (Montvale) (Jackson Hyperthreading, VT) October 31, 2007 - {$696} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | ?KB data ?KB instruction 1MB on-Die unified L2 6MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9120N MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 | 611 pins 1400MHz (200x7.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 6MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9130M MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 | 611 pins 1666MHz (333x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 4MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9140M MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 | 611 pins 1666MHz (333x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 9MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9140N MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 9MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9150M MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 - {$3692} | 611 pins 1666MHz (333x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 12MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9150N MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) October 31, 2007 - {$3692} | 611 pins 1600MHz (266x6.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 12MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium 9152M MMX SSE (Montvale) (dual core, Jackson Hyperthreading, VT) 4Q 2007 | 611 pins 1666MHz (333x5.0) (128-bit dual-pumped bus) ?v | PAC611 | 2x ?KB data 2x ?KB instruction 2x 1MB on-Die unified L2 2x 12MB on-Die unified L3 | 1720 million 0.09µm process 596mm² die |
| Itanium ??? MMX SSE (Fanwood - 2-way) (dual core, Jackson Hyperthreading) 200? | ? pins ?MHz (?x?) (128-bit dual-pumped bus) ?v | ? | 2x ?KB data 2x ?KB instruction 2x ?MB on-Die unified L2 2x ?MB on-Die unified L3 | ? million ?µm process ?mm² die |
| Itanium ??? MMX SSE (Millington - 2-way) (dual core, Jackson Hyperthreading) 200? | ? pins ?MHz (?x?) (128-bit dual-pumped bus) ?v | ? | 2x ?KB data 2x ?KB instruction 2x ?MB on-Die unified L2 2x ?MB on-Die unified L3 | ? million ?µm process ?mm² die |
| Itanium ??? MMX SSE (Shavano) (Jackson Hyperthreading) 200? | ? pins ?MHz (?x?) (128-bit dual-pumped bus) ?v | ? | ?KB data ?KB instruction ?MB on-Die unified L2 ?MB on-Die unified L3 | ? million ?µm process ?mm² die |
| Itanium ??? MMX SSE (Tukwila) (?-bit on-Die DDR3 on-Die PC? mem controller) (quad core, Jackson Hyperthreading) 200? | ? pins ?MHz (?x?) (?-bit ?-pumped bus) ?v | ? | 4x ?KB data 4x ?KB instruction 4x ?MB on-Die unified L2 4x ?MB on-Die unified L3 | >2000 million 0.065µm process ?mm² die |
| Itanium ??? MMX SSE (Dimona) (dual core, Jackson Hyperthreading) 200? | ? pins ?MHz (?x?) (?-bit ?-pumped bus) ?v | ? | 2x ?KB data 2x ?KB instruction 2x ?MB on-Die unified L2 2x ?MB on-Die unified L3 | ? million ?µm process ?mm² die |
| Itanium ??? MMX SSE (Poulson) (multi core, Jackson Hyperthreading) 200? | ? pins ?MHz (?x?) (?-bit ?-pumped bus) ?v | ? | 4x ?KB data 4x ?KB instruction 4x ?MB on-Die unified L2 4x ?MB on-Die unified L3 | ? million ?µm process ?mm² die |